A study on multi-dimensional configurable processor array in hardware and software complex architecture

High performance computing (HPC) usually solves complex science, engineering, and business problems that require huge computation capabilities. The main trend HPC solutions are implemented by supercomputers which are composed of huge amount of general purpose processors as computing nodes on a network, to meet the demand of most high performance computing applications. As the ordinary HPC systems composed of CPUs is limited by power and heat constraints, the system had to be comprised of much larger number of lower-power, lower-performance cores. The high-performance with low power consumption is required. Recently, GPGPU which composes of thousands cores is commonly used to accelerate HPC in many studies, but the actual achieved performance changes greatly for each application relative to its peak performance. In addition, data communication bottleneck among computing nodes also can be solved by through various approaches such as optical communication. FPGA (Field Programmable Gate Array) is a LSI that can implement most suitable specific processor circuit on particular applications. With the development of FPGA technology, many HPC applications can be accelerated by using FPGAs to deliver enormous performance. The configurable HPC systems which accumulated a lot of FPGAs are able to be widely utilized on HPC to implement high performance on low power consumption. We constructed a configurable processor array with multidimensional FPGA array, that named as Virtual Object by Configurable Array of Little Scalable Engine(Vocalise). The proposed system has following features: 1. The design and development is high-e fficiency and easy-to-use for various applica-