A CORDIC-based VLSI array for computing 2D discrete Hartley transform

The inseparability of the 2D discrete Hartley transform (DHT) makes its VLSI design and hardware realization much more expensive. To solve this problem, a new CORDIC-based 2D DHT algorithm and the associated array design are presented. By exploiting the CORDIC (coordinate rotations digital computer) property, the row/column decomposition can be successfully applied to reduce the computational complexity enormously without paying decomposition overhead. The array features systolic computing style, the CORDIC structure of processing elements (PEs), low input/output (I/O) cost, and simple hardware.<<ETX>>

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