Diagramy aktywności języka UML i sieci Petriego w systemach sterowania binarnego - od transformacji do weryfikacji

[1]  Michelle L. Crane,et al.  Towards a UML virtual machine: implementing an interpreter for UML 2 actions and activities , 2008, CASCON '08.

[2]  Marian Adamski,et al.  Design of Embedded Control Systems , 2006 .

[3]  Chyun-Chyi Chen,et al.  Workflow process definition and their applications in e-commerce , 2000, Proceedings International Symposium on Multimedia Software Engineering.

[4]  Edmund M. Clarke,et al.  Formal Methods: State of the Art and Future Directions Working Group Members , 1996 .

[5]  Tim Schattkowsky,et al.  UML 2.0 - overview and perspectives in SoC design , 2005, Design, Automation and Test in Europe.

[6]  Michał Grobelny.  Transformacja diagramów aktywności UML 2.0 do sieci Petriego w systemach sterowania binarnego , 2009 .

[7]  René David,et al.  Petri nets and grafcet - tools for modelling discrete event systems , 1992 .

[8]  Iwona Grobelna,et al.  Formalna analiza interpretowanych algorytmicznych maszyn stanów ASM z wykorzystaniem narzędzia model checker , 2008 .

[9]  Tony Spiteri Staines.  Intuitive Mapping of UML 2 Activity Diagrams into Fundamental Modeling Concept Petri Net Diagrams and Colored Petri Nets , 2008, 15th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems (ecbs 2008).

[10]  Shuzhen Yao,et al.  Consistency Checking of UML Dynamic Models Based on Petri Net Techniques , 2006, 2006 15th International Conference on Computing.

[11]  E. Allen Emerson,et al.  The Beginning of Model Checking: A Personal Perspective , 2008, 25 Years of Model Checking.

[12]  K. L. McMillan,et al.  Automatic verification of sequential circuit designs , 1992, Philosophical Transactions of the Royal Society of London. Series A: Physical and Engineering Sciences.

[13]  Moshe Y. Vardi.  Branching vs. Linear Time: Final Showdown , 2001, TACAS.