Comparative Analysis of SEU in FinFET SRAM Cells for Superthreshold and Subthreshold Supply Voltage Operation
暂无分享,去创建一个
[1] Zhiyu Liu,et al. Independent-gate and tied-gate FinFET SRAM Circuits: Design guidelines for reduced area and enhanced stability , 2007, 2007 Internatonal Conference on Microelectronics.
[2] Robert C. Aitken,et al. Impact of Technology and Voltage Scaling on the Soft Error Susceptibility in Nanoscale CMOS , 2008, 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems.
[3] S. Cristoloveanu,et al. Comparing Single Event Upset sensitivity of bulk vs. SOI based FinFET SRAM cells using TCAD simulations , 2010, 2010 IEEE International SOI Conference (SOI).
[4] O. Flament,et al. 14 MeV neutron-induced SEU in SRAM devices , 2004, IEEE Transactions on Nuclear Science.
[5] Olivier Thomas,et al. Sub-1V, Robust and Compact 6T SRAM cell in Double Gate MOS technology , 2007, 2007 IEEE International Symposium on Circuits and Systems.
[6] P. Hazucha,et al. Cosmic-ray soft error rate characterization of a standard 0.6-/spl mu/m CMOS process , 2000, IEEE Journal of Solid-State Circuits.
[7] L.T. Clark,et al. An Ultra-Low-Power Memory With a Subthreshold Power Supply Voltage , 2006, IEEE Journal of Solid-State Circuits.
[8] Ching-Te Chuang,et al. Investigation of Cell Stability and Write Ability of FinFET Subthreshold SRAM Using Analytical SNM Model , 2010, IEEE Transactions on Electron Devices.
[9] M. Yamaoka,et al. Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology , 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).
[10] Vishwani D. Agrawal,et al. Single Event Upset: An Embedded Tutorial , 2008, 21st International Conference on VLSI Design (VLSID 2008).
[11] Zheng Guo,et al. FinFET-based SRAM design , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..
[12] Yong-Bin Kim,et al. Low power 8T SRAM using 32nm independent gate FinFET technology , 2008, 2008 IEEE International SOC Conference.
[13] L.T. Clark,et al. Ultra-Low Power Radiation Hardened by Design Memory Circuits , 2007, IEEE Transactions on Nuclear Science.