Hardware acceleration for full-wave analysis of integrated circuits

As circuit speeds increase and sizes decrease, lumped sum and quasi-static methods become inaccurate and rigorous analysis via the Method of Moments is then required to achieve accurate results. Unfortunately, this requires the solution of a large, dense matrix. Despite algorithmic advances, there is still a need for solving the system in less time. To this end, we have developed a prototype solver that implements a state-of-the-art algorithm in an accelerated hardware environment. In this paper, we examine our progress to date, which consists of the development of a matrix-vector-multiply unit, the key component of the design.