Application of a Genetic Algorithm to the Design Optimization of a Multilayer Probe Card for Wafer-Level Testing

The number of input and output pads on high-performance IC devices has increased in recent years, and hence wafer-level testing is conventionally performed using a probe card with a multilayer needle layout. This paper employs ANSYS commercial software and a Genetic Algorithm (GA) to optimize the design parameters of a multilayer needle probe card such that the scrub marks produced by the different needle layers are of approximately equal length. A dummy probe card containing both a conventional multilayer needle layout and the optimized needle layout is then fabricated and used in a series of single-contact probing tests. The results reveal that the scrub marks produced by the optimized needle layout are both shorter and of a more uniform length that those produced by the conventional needle design. For both needle layouts, a lower and more stable contact resistance is obtained as the overdrive distance is increased. Finally, a multicontact probing test is performed to evaluate the effect on the contact resistance of probe tip contamination following repeated surface contacts. The results show that the needles in the optimized layout are less heavily contaminated than those in the conventional layout, and hence the contact resistance is both lower and more stable. As a consequence, the probe card requires cleaning less frequently and hence its service life is improved.

[1]  M. Beiley,et al.  A micromachined array probe card-characterization , 1995 .

[2]  Kenneth Alan De Jong,et al.  An analysis of the behavior of a class of genetic adaptive systems. , 1975 .

[3]  Jerry J. Broz,et al.  Probe contact resistance variations during elevated temperature wafer test , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[4]  Yong Liu,et al.  Parameter optimization for wafer probe using simulation , 2005, EuroSimE 2005. Proceedings of the 6th International Conference on Thermal, Mechanial and Multi-Physics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2005..

[5]  M. J. Varnau.  Impact of wafer probe damage on flip chip yields and reliability , 1996, Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium.

[6]  Ting-Yu Chen,et al.  IMPROVEMENTS OF SIMPLE GENETIC ALGORITHM IN STRUCTURAL DESIGN , 1997 .

[7]  D. S. Liu,et al.  Experimental method and FE simulation model for evaluation of wafer probing parameters , 2006, Microelectron. J..

[8]  C. Beddingfield,et al.  Reliability evaluation of probe-before-bump technology , 1999, Twenty Fourth IEEE/CPMT International Electronics Manufacturing Technology Symposium (Cat. No.99CH36330).

[9]  Y. Deguchi,et al.  Highly reliable probe card for wafer testing , 2000, 2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070).

[10]  D.S. Liu,et al.  An Experimental and Numerical Investigation Into Multilayer Probe Card Layout Design , 2006, IEEE Transactions on Electronics Packaging Manufacturing.

[11]  G. Hotchkiss,et al.  Effects of probe damage on wire bond integrity , 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

[12]  John H. Holland,et al.  Adaptation in Natural and Artificial Systems: An Introductory Analysis with Applications to Biology, Control, and Artificial Intelligence , 1992 .

[13]  Kuo-Ning Chiang,et al.  Developing an analytic methodology to accurately predict probing depth in integrated circuit structures , 2006 .

[14]  N. Foo,et al.  Algebraic, geometric, and stochastic aspects of genetic operators , 1972 .