Power management for networked embedded systems

A design challenge in embedded systems is power-efficiency because most embedded systems are powered by battery with limited capacity. It is important to prolong lifetimes of embedded systems while providing performance guarantee. To this end, we study techniques to build power-efficient embedded systems. Dynamic voltage and frequency scaling (DVS) is an effective technique for battery-powered systems to conserve energy consumption. We first study savings for dynamic energy consumption of a processor and present a time-variant scaling algorithm for aperiodic tasks. It is optimal in the sense it is on-line without assumed information about future task releases. We further establish two relationships between computation capacity and deadline misses to provide a statistical real-time guarantee with reduced capacity. Transmission speed slowdown is a technique to save power consumption for wireless transmitters. To deal with the dynamic nature of input arrivals, we model packet scheduling and queuing system in linear time-invariant systems and propose an energy-efficient packet scheduling policy that takes input time-correlation into account. Meanwhile, a slower transmission rate implies that packets stay in the transmitter for a longer time, which may result in unexpected transmitter overload and buffer overflow. We derive upper bounds of the maximum transmission rate under an overload probability, and upper bounds of required buffer size under a packet drop rate. Embedded systems usually consist of processors and a number of other components. Energy-aware processors can be run in different speed levels; components like memory and I/O subsystems and network interface cards can be in a standby state when they are active but idle. We study system-wide energy minimization and develop an exact dynamic programming algorithm for periodic tasks on processors with discrete speed levels. An approximation algorithm in polynomial running time is also proposed to provide bounded performance degradation. Similar optimization and approximation algorithms can also be adapted for on-line scheduling of aperiodic tasks with irregular task releases. A limitation of most DVS-based system-wide energy optimization techniques is that they assume the number of worst-case execution cycles (WCEC) of a task is a constant, independent of CPU frequency. This is not the case when other system components such as memory are taken into account. We decompose task execution time into two parts: on-chip inside the CPU and off-chip outside the CPU. We propose a frequency-aware system-wide energy minimization approach and establish necessary and sufficient conditions for the optimality. By exploiting properties of the conditions, we derive efficient algorithms for the optimal solutions. To evaluate the effectiveness of our approach, we have built a prototype embedded system with our policies. Preliminary results demonstrate the applicability and effectiveness of our approach.