Logic functions representation and synthesis of k-valued digital circuits in linear algebra

The mathematical basics of the non-classical approach to the logical synthesis of k-valued digital structures based on the replacement of the classic mathematical apparatus of logic synthesis (Boolean algebra) to the proposed mathematical apparatus — linear algebra are considered. The logic synthesis process of two valued and multi-valued digital structures in linear algebra including the formation of bases of a linear space and original representation of the implemented logical function are discussed. Mathematical advantages of the proposed approach, which could be the basis for designing of high-speed digital logic structures for various applications are considered.

[1]  Jovanka Pantovic,et al.  Galois Connection for Hyperclones , 2010, 2010 40th IEEE International Symposium on Multiple-Valued Logic.

[2]  Mozammel H. A. Khan,et al.  Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram , 2008, 38th International Symposium on Multiple Valued Logic (ismvl 2008).

[3]  Nikolay N. Prokopenko,et al.  Basic concept of linear synthesis of multi-valued digital structures in linear spaces , 2014, Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014).

[4]  G. Epstein Multiple-Valued Logic Design: an Introduction , 1993 .