Formation of III–V-on-insulator structures on Si by direct wafer bonding

We have studied the formation of III?V-compound-semiconductors-on-insulator (III?V-OI) structures with thin buried oxide (BOX) layers on Si wafers by using developed direct wafer bonding (DWB). In order to realize III?V-OI MOSFETs with ultrathin body and extremely thin body (ETB) InGaAs-OI channel layers and ultrathin BOX layers, we have developed an electron-cyclotron resonance (ECR) O2?plasma-assisted DWB process with ECR sputtered SiO2?BOX layers and a DWB process based on atomic-layer-deposition Al2O3?(ALD-Al2O3) BOX layers. It is essential to suppress micro-void generation during wafer bonding process to achieve excellent wafer bonding. We have found that major causes of micro-void generation in DWB processes with ECR-SiO2?and ALD-Al2O3?BOX layers are desorption of Ar and H2O gas, respectively. In order to suppress micro-void generation in the ECR-SiO2?BOX layers, it is effective to introduce the outgas process before bonding wafers. On the other hand, it is a possible solution for suppressing micro-void generation in the ALD-Al2O3?BOX layers to increase the deposition temperature of the ALD-Al2O3?BOX layers. It is also another possible solution to deposit ALD-Al2O3?BOX layers on thermally oxidized SiO2?layers, which can absorb the desorption gas from ALD-Al2O3?BOX layers.

[1]  Yoshiaki Nakano,et al.  Thin Body III–V-Semiconductor-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors on Si Fabricated Using Direct Wafer Bonding , 2009 .

[2]  Hidetsugu Uchida,et al.  Thermal Desorption and Infrared Studies of Plasma-Enhanced Chemical Vapor Deposited SiO Films with Tetraethylorthosilicate , 1993 .

[3]  M. Takenaka,et al.  High Electron Mobility Metal–Insulator–Semiconductor Field-Effect Transistors Fabricated on (111)-Oriented InGaAs Channels , 2009 .

[4]  N. Taoka,et al.  Sub-10-nm Extremely Thin Body InGaAs-on-Insulator MOSFETs on Si Wafers With Ultrathin $\hbox{Al}_{2}\hbox{O}_{3}$ Buried Oxide Layers , 2011, IEEE Electron Device Letters.

[5]  N. Taoka,et al.  Electron Mobility Enhancement of Extremely Thin Body In0.7Ga0.3As-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors on Si Substrates by Metal–Oxide–Semiconductor Interface Buffer Layers , 2011 .

[6]  Yoshiaki Nakano,et al.  III–V/Ge High Mobility Channel Integration of InGaAs n-Channel and Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with Self-Aligned Ni-Based Metal Source/Drain Using Direct Wafer Bonding , 2012 .

[7]  S. Sugahara,et al.  Carrier-Transport-Enhanced Channel CMOS for Improved Power Consumption and Performance , 2008, IEEE Transactions on Electron Devices.

[8]  U. Gösele,et al.  Semiconductor wafer bonding , 1998 .

[9]  J. P. Hirtz,et al.  The carrier mobilities in Ga0.47In0.53as grown by organo-mettalic CVD and liquid-phase epitaxy , 1981 .

[10]  K. Hjort,et al.  Evaluation of InP-to-silicon heterobonding , 2001 .

[11]  Mitsuru Takenaka,et al.  Self-Aligned Metal Source/Drain InxGa1-xAs n-Metal?Oxide?Semiconductor Field-Effect Transistors Using Ni?InGaAs Alloy , 2011 .

[12]  W. Hwang,et al.  Carbon doping of InGaAs in solid‐source molecular beam epitaxy using carbon tetrabromide , 1994 .

[13]  Low temperature InP/Si wafer bonding , 2004 .

[14]  K. Kakimoto,et al.  Raman spectra from Ga1−xInxAs epitaxial layers grown on GaAs and InP substrates , 1982 .

[15]  M. Takenaka,et al.  Front-gate InGaAs-on-Insulator metal-insulator-semiconductor field-effect transistors , 2010 .

[16]  Klas Hjort,et al.  Plasma-assisted InP-to-Si low temperature wafer bonding , 2002 .

[17]  Shang Da-Shang,et al.  Resistance switching in oxides with inhomogeneous conductivity , 2013, 1304.3290.

[18]  Di Liang,et al.  Highly efficient vertical outgassing channels for low-temperature InP-to-silicon direct wafer bonding on the silicon-on-insulator substrate , 2008 .

[19]  Tadatomo Suga,et al.  Wafer direct bonding of compound semiconductors and silicon at room temperature by the surface activated bonding method , 1997 .

[20]  Yoshiaki Nakano,et al.  Ultrathin Body InGaAs-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors with InP Passivation Layers on Si Substrates Fabricated by Direct Wafer Bonding , 2011 .

[21]  P. Ye,et al.  Capacitance-voltage studies on enhancement-mode InGaAs metal-oxide-semiconductor field-effect transistor using atomic-layer-deposited Al2O3 gate dielectric , 2006 .

[22]  S. Takagi,et al.  Low-driving-current InGaAsP photonic-wire optical switches using III–V CMOS photonics platform , 2012, 2012 38th European Conference and Exhibition on Optical Communications.

[23]  Yoshiaki Nakano,et al.  InGaAsP Photonic Wire Based Ultrasmall Arrayed Waveguide Grating Multiplexer on Si Wafer , 2009 .

[24]  Yoshiaki Nakano,et al.  InP photonic wire waveguide using InAlAs oxide cladding layer. , 2007, Optics express.

[25]  M. Takenaka,et al.  III-V-semiconductor-on-insulator n-channel metal-insulator-semiconductor field-effect transistors with buried Al2O3 layers and sulfur passivation: Reduction in carrier scattering at the bottom interface , 2010 .

[26]  High Performance Extremely Thin Body InGaAs-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors on Si Substrates with Ni–InGaAs Metal Source/Drain , 2011 .