On channel segmentation design for row-based FPGAs

The channel segmentation design problem for row-based field-programmable gate arrays (FPGAs) is to design a segmented channel to maximize the probability of successful routing. An algorithm which takes an arbitrary net distribution and an integer K (specifying the maximum number of segments allowed in routing a net) as inputs, and automatically generates a segmented channel which is most suitable for K-segment channel routing is presented. The algorithm was tested extensively over various net distributions. An algorithm for segmented channel routing based on reducing the problem to the maximum independent set problem for undirected graphs is also presented.<<ETX>>

[1]  A. El Gamal,et al.  An architecture for electrically configurable gate arrays , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

[2]  V. Roychowdhury,et al.  Segmented channel routing , 1990, 27th ACM/IEEE Design Automation Conference.

[3]  Ravi B. Boppana,et al.  Approximating maximum independent sets by excluding subgraphs , 1990, BIT.

[4]  Abbas El Gamal,et al.  Segmented channel routing in nearly as efficient as channel routing (and just as hard) , 1991 .

[5]  Ravi B. Boppana,et al.  Approximating maximum independent sets by excluding subgraphs , 1992, BIT Comput. Sci. Sect..

[6]  L. Cooke,et al.  An MPGA Compatible FPGA Architecture , 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

[7]  Vwani P. Roychowdhury,et al.  Segmented channel routing , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..