Verification of the Tamarack-3 Microprocessor in a Hybrid Verification Environment

HOL-Voss is a hybrid verification system which combines symbolic simulation and model-checking with the HOL system. The purpose of HOL-Voss is to provide an environment for verification which requires less general theorem-proving expertise and to explore the efficient and automated symbolic trajectory evaluation. To verify Tamarack-3 in HOL-Voss, we need to translate a behavioral description of Tamarack-3 in HOL to a more informative switch-level description. Maintaining consistency between different levels of description was one the major focuses in the exercise. Therefore, providing a systematic approach to translations of specifications is an important goal of our research. In this report, we discuss three aspects in the translation: Implementation of Tamarack-3 instructions by sequences of microinstructions; integrating circuit implementation parameters; and factorization of the internal memory description to make it external.