A General Purpose 1.8-V 12-b 4-MS/s Fully Differential SAR ADC With 7.2-Vpp Input Range in 28-nm FDSOI

This brief describes a differential, 1.8-V, 12-bit 4-MS/s successive approximation register (SAR) analog to digital converter (ADC) with innovative input switch that supports up to 3.6 V inputs using only 1.8-V devices in 28-nm process. This SAR ADC is based on 6–6 split capacitor digital to analog converter architecture with separate sampling capacitor. It features eight pairs of differential input channels. It has a full-scale input range, multiple speed/power modes, and power-down mode for low current consumption. The ADC performs to 11.35 effective number of bits when tested up to 125 C at supply voltages ranging from 1.6 V to 2.0 V and reference voltages ranging from 0.8 V to 2.0 V. Fabricated in a 28-nm fully depleted silicon on insulator process with fringe capacitors, it occupies an area of 0.13 mm<sup>2</sup> and has a total dissipation of 960 <inline-formula> <tex-math notation="LaTeX">$ {\mu }\text{A}$ </tex-math></inline-formula> in full speed differential mode and 400 <inline-formula> <tex-math notation="LaTeX">${\mu }\text{A}$ </tex-math></inline-formula> in low-power single-ended mode. The ADC has been integrated and is in production.

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