Power-aware VLSI design of reversible watermarking for access control
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[1] J. S. Chitode,et al. Least Significant Bit and Discrete Wavelet Transform Algorithm Realization for Image Steganography Employing FPGA , 2016 .
[2] Zhe-Ming Lu,et al. High performance reversible data hiding for block truncation coding compressed images , 2013, Signal Image Video Process..
[3] Ching-Nung Yang,et al. Lossless data hiding for absolute moment block truncation coding using histogram modification , 2016, Journal of Real-Time Image Processing.
[4] Amit Phadikar,et al. FPGA Implementation of Lifting-Based Data Hiding Scheme for Efficient Quality Access Control of Images , 2018, Circuits Syst. Signal Process..
[5] Subhajit Das,et al. VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach , 2018, Circuits Syst. Signal Process..
[6] V. Sadasivam,et al. Security of health imagery via reversible watermarking based on differential evolution , 2014, 2014 International Conference on Medical Imaging, m-Health and Emerging Communication Systems (MedCom).
[7] Hirak Kumar Maity,et al. FPGA implementation of reversible watermarking in digital images using reversible contrast mapping , 2014, J. Syst. Softw..
[8] Jean-Marie Moureaux,et al. Low power hardware-based image compression solution for wireless camera sensor networks , 2012, Comput. Stand. Interfaces.
[9] Asifullah Khan,et al. A high capacity reversible watermarking approach for authenticating images: Exploiting down-sampling, histogram processing, and block selection , 2014, Inf. Sci..
[10] N. N. Jani,et al. Reversible Watermarking Technique for Medical Images Using Fixed Point Pixel , 2015, 2015 Fifth International Conference on Communication Systems and Network Technologies.
[11] Amal Zerrouki,et al. Power-Aware FPGA Design , 2009 .
[12] Saraju P. Mohanty,et al. A dual voltage-frequency VLSI chip for image watermarking in DCT domain , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[13] Hafizur Rahaman,et al. FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time , 2017, Journal of Real-Time Image Processing.
[14] Amit Phadikar,et al. Quantization Based Data Hiding Scheme for Efficient Quality Access Control of Images Using DWT via Lifting , 2008, 2008 Sixth Indian Conference on Computer Vision, Graphics & Image Processing.
[15] Ton Kalker,et al. Digital watermarking for DVD video copy protection , 2000 .
[16] Hafizur Rahaman,et al. Dual Mode VLSI Architecture for Spread Spectrum Image Watermarking using Binary Watermark , 2012 .
[17] Amit Phadikar,et al. FPGA Based Low Power Hardware Implementation for Quality Access Control of a Compressed Gray Scale Image , 2017 .
[18] Chun-Chi Lo,et al. Reversible Data Hiding Scheme for BTC-compressed Images Based on Histogram Shifting , 2014 .
[19] Santi P. Maity,et al. Distortion free image-in-image communication with implementation in FPGA , 2013 .
[20] S. N. Merchant,et al. Watermarking Hardware Based on Wavelet Coefficients Quantization Method , 2013, Circuits Syst. Signal Process..
[21] Eero P. Simoncelli,et al. Image quality assessment: from error visibility to structural similarity , 2004, IEEE Transactions on Image Processing.
[22] Amit Phadikar,et al. A new model of QIM data hiding for quality access control of digital image , 2015, 2015 International Conference on Soft-Computing and Networks Security (ICSNS).
[23] Zhou Wang,et al. Image Quality Assessment: From Error Measurement to Structural Similarity , 2004 .
[24] M. Nagabushanam,et al. Fast Implementation of Lifting based 1D/2D/3D DWT-IDWT Architecture for Image Compression , 2012 .
[25] Malay Kumar Kundu,et al. Dual purpose FWT domain spread spectrum image watermarking in real time , 2009, Comput. Electr. Eng..