A 90ns 256K × 1b DRAM with double level A1 technology

A 256K DRAM with 90<tex>\overline{RAS}</tex>access time using double level aluminum technology will be reported. Employed are 1.3μ design rules and 160Å effective oxide thickness in a cell area of 66.5μ<sup>2</sup>. Chip area is 34mm<sup>2</sup>.

[1]  T. Mano,et al.  A 256K RAM fabricated with molybdenum-polysilicon technology , 1980, 1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[2]  T. Wada,et al.  A 256K bit dynamic RAM , 1980, IEEE Journal of Solid-State Circuits.

[3]  T. Mano,et al.  A 256K dynamic MOS RAM with alpha immune and redundancy , 1982 .

[4]  K. Itoh,et al.  A single 5V 64K dynamic RAM , 1980, 1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[5]  A. C. Dumbri,et al.  A 256K dynamic random access memory , 1982, IEEE Journal of Solid-State Circuits.