Investigation of a latch-up immune silicon controlled rectifier for robust ESD application

A latch-up immune robust SCR with an N+ top layer and an additional Nwell region (Nwell2) is proposed in this paper. The N+ top layer and Nwell2 divide the original SCR into three new SCRs with sharing emitter, which provide the deeper ESD current (I<inf>esd</inf>) path to improve the holding voltage (V<inf>h</inf>) and failure current (I<inf>t2</inf>). The relation between V<inf>h</inf> and base-concentration (N<inf>b</inf>) for LVTSCR is given to provide an in-depth insight into the mechanism for enhancing V<inf>h</inf> by changing N<inf>b</inf>. The N+ top layer and NWELL2 form three base regions (B1, B2 and B3) with different concentration to optimize the I<inf>ESD</inf> distribution and V<inf>h</inf>. The longer ESD current path improves the V<inf>h</inf> by reducing the current gain. The deeper current distribution makes the total temperature is endured by inner lattice instead of surface lattice, which improves the I<inf>t2</inf>. DC and dynamic TLP simulation results show the V<inf>h</inf> = 5.3 V of proposed SCR is achieved with a higher failure current (I<inf>t2</inf>) of 1.68e-2A/μm.