A monolithic CMOS IF integrated circuit for a superheterodyne transceiver

A monolithic CMOS IF integrated circuit for a superheterodyne transceiver is designed in standard 0.18μm RF CMOS technology, which mainly includes an IF receiver, an IF transmitter and a local oscillation signal generator. The large-dynamic-range receiver is composed of an attenuating unit, a variable gain amplifier, a down-conversion mixer and a fixed-gain-amplifier stage. The transmitter is basically an up-conversion mixer, which mixes the 140MHz input signal with the local oscillation signal to produce the 800MHz output signal. The local oscillation signal generator is realized by a PLL-based frequency multiplier. Simulation results show that the gain range of VGA is from −5dB to 50dB. The noise factor, and input P1dB linearities of the receiver are 24.9dB, −51.74dBm@highest gain, and −17.83dBm@ lowest gain, respectively. The input P1dB of the up-conversion mixer is −16.69dBm.

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