A Flexible Architecture Representation for High Level Synthesis

This paper presents the Flexible Architecture Representation , which is capable of representing complex hierarchical designs for synthesis as well as complex library components for hardware reuse. Contrary to previous representations used in high-level synthesis, the Flexible Architecture Representation supports multiple levels of controllers and thus enables a much larger degree of parallellism in the architecture. The exibility of the representation is useful for optimizing an architecture by transforming the associated hierarchy , e.g. in order to increase hardware sharing. Likewise, library components with exible architec-tures are not untouchable as in traditional synthesis systems. Complex library components may therefore be be adapted to the speciic application in which they are to be used and thus increase the degree of reuse.