An 85 MHz IF bandpass sigma–delta modulator for CDMA receivers

An 8th-order double-sampled SC bandpass sigma-delta modulator is presented. This circuit is implemented in a 0.6 µm CMOS technology and operates at a sampling frequency of 64 MHz. The signal bandwidth is 1.25 MHz centered at 85 MHz, the measured SNDR is 58.2 dB. The circuit operates at 3 V and consumes 48 mW.