Convergence problems can significantly limit the practical value of numerical device simulation, especially where the ability to obtain stable results for a wide range of process conditions is crucial. Solving the semiconductor device equations is difficult for several reasons: solutions exhibit extremely rapid spatial variations in thin boundary layers at p-n junctions and inversion/depletion layers, equations are strongly nonlinear, a unique steady-state solution may not exist for a given set of bias conditions, loss of accuracy is possible when evaluating physical model equations. At the same time, the solution can be quite sensitive to the boundary conditions, making a certain level of accuracy necessary to ensure convergence of the nonlinear iteration. As a result, convergence problems are known to exist. Remedies for these problems are, if at all, usually found heuristically, rarely understanding the reasons for the problem or why a particular approach works better than others. In this paper, an analysis of the situation is presented and an example demonstrates how improving grid quality can help solve convergence problems. A tradeoff between reducing discretization error and improving convergence and stability is demonstrated. The approach is justified on the grounds of basic finite element theory and demonstrated using a practical application (power MOS breakdown simulation).
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