The APVE emulator to prevent front-end buffer overflows within the CMS silicon strip tracker

A digital circuit board, employing Field Programmable Gate Array (FPGA) technology, has been built to emulate the logic of the pipeline memory of the APV25 readout circuit for the CMS Silicon Strip Tracker. The primary function of the APVE design is to prevent buffer overflows in the APV25. It will also provide information to the Front End Drivers (FEDs) to ensure synchronisation throughout the Silicon Strip Tracker. The purpose and functionality of the APVE is presented along with a prediction of the performance from simulation results.