Optimization of SEU Simulations for SRAM Cells Reliability under Radiation

A simplified RC circuit is used to simulate effects of ionizing particles in a 90 nm SRAM. The main characteristics of the memory cell bit flip are discussed and a SEU criterion is presented. The effect of the surrounded circuit on the struck transistor is also discussed in order to extract parameters characteristic of the SEU occurrence.

[1]  A. Peczalski,et al.  Physical SEU model for circuit simulations , 1988 .

[2]  G Hubert,et al.  Simulation of Single and Multi-Node Collection: Impact on SEU Occurrence in Nanometric SRAM Cells , 2011, IEEE Transactions on Nuclear Science.

[3]  Mathieu Lisart,et al.  Electrical modeling of the effect of beam profile for pulsed laser fault injection , 2009, Microelectron. Reliab..

[4]  F. Wrobel,et al.  Criterion for SEU occurrence in SRAM deduced from circuit and device Simulations in case of neutron-induced SER , 2005, IEEE Transactions on Nuclear Science.

[5]  Hervé Lapuyade,et al.  SPICE modeling of the transient response of irradiated MOSFETs , 1999 .

[6]  K. Johansson,et al.  In-flight and ground testing of single event upset sensitivity in static RAMs , 1997 .

[7]  A. Lesea,et al.  Circuit Effect on Collection Mechanisms Involved in Single Event Phenomena: Application to the Response of a NMOS Transistor in a 90 nm SRAM Cell , 2011, IEEE Transactions on Nuclear Science.

[8]  E.E. Vogt,et al.  Prediction of SOI single-event effects using a simple physics-based SPICE model , 2005, IEEE Transactions on Nuclear Science.

[9]  J. Holmes,et al.  A Bias-Dependent Single-Event Compact Model Implemented Into BSIM4 and a 90 nm CMOS Process Design Kit , 2009, IEEE Transactions on Nuclear Science.

[10]  E. Normand.  Single event upset at ground level , 1996 .

[11]  Frédéric Wrobel,et al.  Incidence of multi-particle events on soft error rates caused by n-Si nuclear reactions , 2000 .

[12]  B.L. Bhuva,et al.  Effect of Well and Substrate Potential Modulation on Single Event Pulse Shape in Deep Submicron CMOS , 2007, IEEE Transactions on Nuclear Science.

[13]  F. Saigne,et al.  Innovative Simulations of Heavy Ion Cross Sections in 130 nm CMOS SRAM , 2007, IEEE Transactions on Nuclear Science.

[14]  Guillaume Hubert,et al.  Device simulation study of the SEU sensitivity of SRAMs to internal ion tracks generated by nuclear reactions , 2001 .

[15]  P. Dodd,et al.  Various SEU conditions in SRAM studied by 3-D device simulation , 2001 .

[16]  Eugene Normand,et al.  Investigation and Characterization of SEU Effects and Hardening Strategies in Avionics. , 1995 .

[17]  Lorena Anghel,et al.  Prediction of transient induced by neutron/proton in CMOS combinational logic cells , 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

[18]  P. Perdu,et al.  Influence of Laser Pulse Duration in Single Event Upset Testing , 2005, IEEE Transactions on Nuclear Science.