论文信息 - Differential pass-transistor clocked flipflop

Differential pass-transistor clocked flipflop

A new differential pass-transistor clocked (DPTC) flipflop for low power application is presented. This design prevents speed degradation and redundant power consumption by cutting the low-impedance path of the struggling slave latch in the conventional pass-transistor clocked flipflop. Simulation results show that it reduces the power-delay product by 30% and the delay mismatch between two differential outputs to <2%.

Sung-Mo Kang | In-Chul Hwang

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