Hardware implementing method for loop filter based on AVS

The invention discloses a hardware realization method based on a loop filter of AVS. The method modifies 80 8-bit controllable registers in a traditional queue conversion structure into 80 8-bit pure registers. The data do not need to be input from the most left terminal at the time of vertical filtering, only need to be input from the left terminal of p2; vertical filtering can be carried out after horizontally filtering for 6 weeks. The register groups at the left and right sides can be multiplexed in a one-dimensional filter module. Queue conversion converts the vertical data into the horizontal data, so that the one-dimensional filter module can uniformly process the horizontal and vertical data, thereby having the advantages of saving resources, reducing nearly half area, and meanwhile reducing clock period and lowering power consumption of the module greatly. The time sequence control module in the loop filter adopts a Mealy state machine to realize controlling state transition of the process based on different boundary strength (BS) value, to achieve reasonable processing to the data and adaptive jump of state, so that the system code is easily maintained.