Analysis of Failure Mechanism on Gate-Silicided and Gate-Non-Silicided, Drain/Source Silicide-blocked ESD NMOSFETs in a 65nm Bulk CMOS Technology
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R. Gauthier | K. Chatty | C. Seguin | R. Halbach | J. Li | C. Russ | D. Alvarez | M.J. Abou-Khalil
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