Verification of I/O trace set inclusion for a class of non-deterministic finite state machines
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[1] Eduard Cerny. A compositional transformation for formal verification , 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.
[2] Edmund M. Clarke,et al. Symbolic Model Checking: 10^20 States and Beyond , 1990, Inf. Comput..
[3] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[4] Olivier Coudert,et al. A unified framework for the formal verification of sequential circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[5] David S. Johnson,et al. Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .
[6] Eduard Cerny,et al. An Approach to Unified Methodology of Combinational Switching Circuits , 1977, IEEE Transactions on Computers.