论文信息 - Direct tunneling current model for circuit simulation

Direct tunneling current model for circuit simulation

This paper presents a compact direct tunneling current model for circuit simulation to predict ultra-thin gate oxide (<2.0 nm) CMOS circuit performance by introducing an explicit surface potential model with quantum-mechanical corrections. It demonstrates good agreement with the results from the numerical solver and measured data for the very-thin gate oxide thicknesses ranging 1.3-1.8 nm.

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