SimGen: Development of Efficient Instruction Set Simulators

A simulator is a powerful tool for both hardware and software development. However, implementing an efficient simulator by hand is a labour intensive and error-prone task. This paper describes a tool for automating significant portions of the work involved in developing instruction set architecture simulators while still generating an efficient simulator. We believe that the tool significantly shortens the design time. A specification file describing the instruction set is used as input to the tool. With this technique we have generated a SPARC V8 simulator which is more efficient than an earlier hand-coded and hand-optimized version. The tool has also been applied to APZ 21220, a proprietary embedded CISC processor, demonstrating the generality of the technique.

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