A pareto-based systematic design technique for reconfigurable analog circuits using an evolutionary optimization algorithm

In this paper, a technique to systematically design analog reconfigurable integrated circuits is presented. The methodology is based on a simulation-based optimization process that uses an evolutionary multi-objective algorithm. As it is well known, this kind of algorithms relies in the concept of Paretobased dominance. To cope with the complexity of reconfiguration in analog circuits, this concept is appropriately re-defined here with the notion of multi-mode Pareto-optimal fronts. The proposed solution is tested against a set of experiments to design a reconfigurable, fully-differential operational amplifier, whose performance trade-offs can be analyzed following the reported methodology. Moreover, some directions are given on the use of the resulting multi-mode Pareto-optimal fronts in a hierarchical synthesis methodology of reconfigurable analog circuits.

[1]  Francisco V. Fernández,et al.  Multimode Pareto fronts for design of reconfigurable analogue circuits , 2009 .

[2]  Georges G. E. Gielen,et al.  Power estimation methods for analog circuits for architectural exploration of integrated systems , 2002, IEEE Trans. Very Large Scale Integr. Syst..

[3]  R. K. Ursem Multi-objective Optimization using Evolutionary Algorithms , 2009 .

[4]  F. Svelto,et al.  Toward multistandard mobile terminals - fully integrated receivers requirements and architectures , 2005, IEEE Transactions on Microwave Theory and Techniques.

[5]  Kalyanmoy Deb,et al.  A fast and elitist multiobjective genetic algorithm: NSGA-II , 2002, IEEE Trans. Evol. Comput..

[6]  Georges G. E. Gielen,et al.  Efficient multiobjective synthesis of analog circuits using hierarchical Pareto-optimal performance hypersurfaces , 2005, Design, Automation and Test in Europe.

[7]  Edoardo Charbon,et al.  A Top-down, Constraint-Driven Design Methodology for Analog Integrated Circuits , 1993 .

[8]  Elisenda Roca,et al.  Using Pareto-Optimal Fronts in the Design of Reconfigurable Data Converters , 2009, 2009 Second International Conference on Advances in Circuits, Electronics and Micro-electronics.

[9]  Michiel Steyaert,et al.  Hierarchical bottom-up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[10]  DebK.,et al.  A fast and elitist multiobjective genetic algorithm , 2002 .

[11]  Rob A. Rutenbar,et al.  Computer-aided design of analog and mixed-signal integrated circuits , 2000, Proceedings of the IEEE.