Using SAT techniques in dynamic burn-in vector generation
暂无分享,去创建一个
[1] Masahiro Fujita,et al. Symbolic model checking using SAT procedures instead of BDDs , 1999, DAC '99.
[2] Niklas Sörensson,et al. An Extensible SAT-solver , 2003, SAT.
[3] Pallab Dasgupta,et al. Bounded Delay Timing Analysis Using Boolean Satisfiability , 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).
[4] Kuo-Chan Huang,et al. Maximization of power dissipation under random excitation for burn-in testing , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[5] Jaume Segura,et al. Test and Reliability: Partners in IC Manufacturing, Part 2 , 1999, IEEE Des. Test Comput..
[6] Pallab Dasgupta,et al. Satisfiability Models for Maximum Transition Power , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[7] Seda Ogrenci Memik,et al. Accelerated SAT-based scheduling of control/data flow graphs , 2002, Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors.
[8] A. Benso,et al. ATPG for Dynamic Burn-In Test in Full-Scan Circuits , 2006, 2006 15th Asian Test Symposium.
[9] K. Sakallah,et al. Generic ILP versus specialized 0-1 ILP: an update , 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..
[10] Rob A. Rutenbar,et al. A comparative study of two Boolean formulations of FPGA detailed routing constraints , 2001, IEEE Transactions on Computers.
[11] Fadi A. Aloul,et al. Using SAT-based techniques in power estimation , 2007, Microelectron. J..
[12] Andreas Kuehlmann,et al. A fast pseudo-Boolean constraint solver , 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[13] David Blaauw,et al. Robust SAT-Based Search Algorithm for Leakage Power Reduction , 2002, PATMOS.
[14] Serge N. Demidenko,et al. Shortening Burn-In Test: Application of HVST and Weibull Statistical Analysis , 2007, IEEE Transactions on Instrumentation and Measurement.
[15] Karem A. Sakallah,et al. Pueblo: a modern pseudo-Boolean SAT solver , 2005, Design, Automation and Test in Europe.
[16] A. A. Sagahyroon. Maximizing heat dissipation for burn-in testing , 2002, IEEE CCECE2002. Canadian Conference on Electrical and Computer Engineering. Conference Proceedings (Cat. No.02CH37373).