Linear sifting of decision diagrams and its application insynthesis

We propose a new algorithm, called linear sifting, for the optimization of decision diagrams that combines the efficiency of sifting and the power of linear transformations. The new algorithm is applicable to large examples, and in many cases leads to substantially more compact diagrams when compared to simple variable reordering. We also show in what sense linear transformations complement variable reordering and how the technique can be applied to verification issues. Going a step further, we discuss a synthesis scenario where-due to the complexity of the target function-it is inevitable to decompose the function in a preprocessing step. By using linear sifting it is possible to extract a linear filter and, hence, to achieve the necessary decomposition. Using this method we were able to synthesize functions with standard tools which fail otherwise.

[1]  A. Sangiovanni-Vincentelli,et al.  Partitioned ROBDDs—a compact, canonical and efficiently manipulable representation for Boolean functions , 1996, ICCAD 1996.

[2]  Robert K. Brayton,et al.  BDD minimization by truth table permutations , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[3]  David Bryan,et al.  Combinational profiles of sequential benchmark circuits , 1989, IEEE International Symposium on Circuits and Systems,.

[4]  Masatoshi Sekine,et al.  Synthesis by spectral translation using Boolean decision diagrams , 1996, DAC '96.

[5]  Wolfgang Rosenstiel,et al.  Multilevel logic synthesis based on functional decision diagrams , 1992, [1992] Proceedings The European Conference on Design Automation.

[6]  P. R. Stephan,et al.  SIS : A System for Sequential Circuit Synthesis , 1992 .

[7]  Enrico Macii,et al.  Algorithms for approximate FSM traversal based on state space decomposition , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  Rolf Drechsler,et al.  Linear transformations and exact minimization of BDDs , 1998, Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No.98TB100222).

[9]  Shin-ichi Minato,et al.  Fast factorization method for implicit cube set representation , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  F. Somenzi,et al.  Who are the variables in your neighbourhood , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[11]  Tiziano Villa,et al.  VIS: A System for Verification and Synthesis , 1996, CAV.

[12]  Paolo Prinetto,et al.  A new model for improving symbolic product machine traversal , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[13]  Stanley L. Hurst,et al.  Spectral techniques in digital logic , 1985 .

[14]  Christoph Meinel,et al.  Algorithms and Data Structures in VLSI Design: OBDD - Foundations and Applications , 2012 .

[15]  F. Somenzi,et al.  High-density reachability analysis , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[16]  R. Rudell Dynamic variable ordering for ordered binary decision diagrams , 1993, ICCAD 1993.

[17]  F. Brglez,et al.  A neutral netlist of 10 combinational benchmark circuits and a target translator in FORTRAN , 1985 .

[18]  E. A. Trachtenberg,et al.  Design automation tools for efficient implementation of logic functions by decomposition , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[19]  Robert K. Brayton,et al.  Sequential circuit design using synthesis and optimization , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[20]  Vishwani D. Agrawal,et al.  Optimizing logic design using Boolean transforms , 1998, Proceedings Eleventh International Conference on VLSI Design.

[21]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[22]  Christoph Meinel,et al.  Local Encoding Transformations for Optimizing OBDD-Representations of Finite State Machines , 1996, Formal Methods Syst. Des..

[23]  Olivier Coudert,et al.  Two-level logic minimization: an overview , 1994, Integr..

[24]  Enrico Macii,et al.  Algorithms for Approximate FSM Traversal , 1993, 30th ACM/IEEE Design Automation Conference.

[25]  Sarma Vrudhula,et al.  EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[26]  Shin-ichi Minato,et al.  Zero-Suppressed BDDs for Set Manipulation in Combinatorial Problems , 1993, 30th ACM/IEEE Design Automation Conference.

[27]  Masahiro Fujita,et al.  On variable ordering of binary decision diagrams for the application of multi-level logic synthesis , 1991, Proceedings of the European Conference on Design Automation..

[28]  Jochen Bern,et al.  Efficient OBDD-Based Boolean Manipulation in CAD Beyond Current Limits , 1995, 32nd Design Automation Conference.

[29]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[30]  Randal E. Bryant,et al.  Verification of Arithmetic Circuits with Binary Moment Diagrams , 1995, 32nd Design Automation Conference.