A scalar cost function for analyzing the quality of totally self-checking design methodologies

This paper proposes a scalar cost function for analyzing the quality of Totally Self-Checking combinational devices; in particular the presented evaluator allows one to take into account other significant aspects affecting a TSC implementation rather than area overhead. The cost function is based on a measure which dynamically defines the probability to achieve the TSC goal at cycle t with respect to fault occurrence and circuit stimulation. As some experimental results highlight, the smallest circuits aren't always the most desirable one.

[1]  Eiji Fujiwara,et al.  Probability to Achieve TSC Goal , 1996, IEEE Trans. Computers.

[2]  Nur A. Touba,et al.  Logic synthesis techniques for reduced area implementation of multilevel circuits with concurrent error detection , 1994, ICCAD '94.

[3]  Donatella Sciuto,et al.  Conditions for the design of circuits with concurrent error detection properties , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

[4]  James E. Smith,et al.  Strongly Fault Secure Logic Networks , 1978, IEEE Transactions on Computers.