Optimizing Compiler Based on Complementary Predicate

Predicated execution promises to reduce control flow overhead and to enhance optimization,provided that instruction scheduling and register allocation can utilize it efficiently.Based on binary decision diagram(BDD) predicate analysis system,this paper proposes the method to optimize control structures in programs utilizing complementary predicate.And based on traditional graph coloring register allocation,a new algorithm to construct unified and simplified interference graph utilizing complementary predicate is presented,which can reduce spill code.Moreover,complementary predicate-aware scheduling is proposed to reduce the superfluous commitment of resources to operations whose predicates evaluate to false at run-time,and the architecture is modified to support scheduling.Experiment results in YHFT-DSP/700 compiler show the effectiveness of proposal method.