Optimized FPGA-implementation of quadrature DDS

This paper presents the optimized implementation of high performance quadrature direct digital synthesizers (DDS). Although VLSI designs and optimizations have already been discussed in the literature they may not be successfully translated into an FPGA-based technology. This work examines each phase-to-amplitude mapping technique, such as ROM compression and partitioning techniques and the CORDIC algorithm, and it proposes the most suitable structure for Virtex FPGAs in order to obtain the most efficient implementation in terms of area and throughput.

[1]  F. Cardells-Tormo,et al.  Optimisation of direct digital frequency synthesisers based on CORDIC , 2001 .

[2]  H. Samueli,et al.  An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation , 1987, 41st Annual Symposium on Frequency Control.

[3]  Chris Dick,et al.  Configurable logic for digital communications: some signal processing perspectives , 1999, IEEE Commun. Mag..

[4]  J. Vankka.  Methods of mapping from phase to sine amplitude in direct digital synthesis , 1997, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.

[5]  Mark Cummings,et al.  FPGA in the software radio , 1999, IEEE Commun. Mag..

[6]  B. Gold,et al.  A digital frequency synthesizer , 1971 .

[7]  A.M. Fahim,et al.  Low-power direct digital frequency synthesis for wireless communications , 2000, IEEE Journal of Solid-State Circuits.

[8]  H. Samueli,et al.  The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects , 1988, Proceedings of the 42nd Annual Frequency Control Symposium, 1988..

[9]  Keshab K. Parhi,et al.  Efficient mapping of CORDIC algorithms on FPGA , 2000, 2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528).

[10]  Gerhard Fettweis,et al.  The digital front-end of software radio terminals , 1999, IEEE Wirel. Commun..

[11]  Jack E. Volder.  The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..

[12]  R. J. van de Plassche,et al.  A 540-MHz 10-b polar-to-Cartesian converter , 1991 .

[13]  H. Samueli,et al.  A 150-MHz Direct Digital Frequency Synthesizer In 1.25/spl mu/m CMOS With -90dBc Spurious Performance , 1991 .

[14]  H. Samueli,et al.  A 200 MHz quadrature digital synthesizer/mixer in 0.8 /spl mu/m CMOS , 1995 .

[15]  A. Y. Kwentus,et al.  A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range , 1999, IEEE J. Solid State Circuits.

[16]  Gerhard Fettweis,et al.  Digital down conversion in software radio terminals , 2000, 2000 10th European Signal Processing Conference.

[17]  V. Reinhardt.  Spur reduction techniques in direct digital synthesizers , 1993, 1993 IEEE International Frequency Control Symposium.

[18]  Venceslav F. Kroupa,et al.  A 200 MHz Quadrature Digital Synthesizer/Mixer in 0.8 m CMOS , 1999 .

[19]  C. R. Cole,et al.  CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications , 1984 .

[20]  Markku Renfors,et al.  Area-optimized FPGA implementation of a digital FM modulator , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[21]  Jouko Vankka.  1996 IEEE INTERNATIONAL FREQUENCY CONTROL SYMPOSIUM METHODS OF MAPPING FROM PHASE TO SINE AMPLITUDE IN DIRECT DIGITAL SYNTHESIS , 1996 .

[22]  Michael Rice,et al.  Synchronization in software radios. Carrier and timing recovery using FPGAs , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).