Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems
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Hori Yohei | Toda Kenji | Satoh Akashi | Sakane Hirofumi | Y. Hori | K. Toda | Akashi Satoh | Hirofumi Sakane
[1] Saar Drimer. Authentication of FPGA Bitstreams: Why and How , 2007, ARC.
[2] Lilian Bossuet,et al. Dynamically Configurable Security for SRAM FPGA Bitstreams , 2004, IPDPS.
[3] Chanathip Namprempre,et al. Authenticated Encryption: Relations among Notions and Analysis of the Generic Composition Paradigm , 2000, Journal of Cryptology.
[4] Russ Housley,et al. Counter with CBC-MAC (CCM) , 2003, RFC.
[5] Charles E. Stroud,et al. Dynamic fault tolerance in FPGAs via partial reconfiguration , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).
[6] Xiaoyun Wang,et al. Finding Collisions in the Full SHA-1 , 2005, CRYPTO.
[7] William C. Barker,et al. TECHNOLOGY ADMINISTRATION , 2004 .
[8] Guy Gogniat,et al. Software Radio and Dynamic Reconfiguration on a DSP/FPGA platform , 2004 .
[9] Mihir Bellare,et al. OCB: a block-cipher mode of operation for efficient authenticated encryption , 2001, CCS '01.
[10] Takeshi Sugawara,et al. High-Speed Pipelined Hardware Architecture for Galois Counter Mode , 2007, ISC.
[11] H. Niederreiter,et al. Finite Fields: Encyclopedia of Mathematics and Its Applications. , 1997 .
[12] Jürgen Becker,et al. Dynamic and Partial FPGA Exploitation , 2007, Proceedings of the IEEE.
[13] Kenji Toda,et al. A Secure Content Delivery System Based on a Partially Reconfigurable FPGA , 2008, IEICE Trans. Inf. Syst..
[14] John Viega,et al. The Security and Performance of the Galois/Counter Mode (GCM) of Operation , 2004, INDOCRYPT.
[15] D. Wagner,et al. A Conventional Authenticated-Encryption Mode , 2003 .
[16] D. McGrew,et al. The Galois/Counter Mode of Operation (GCM) , 2005 .
[17] Akashi Satoh. High-Speed Parallel Hardware Architecture for Galois Counter Mode , 2007, 2007 IEEE International Symposium on Circuits and Systems.
[18] Walter Stechele,et al. Using Partial-Run-Time Reconfigurable Hardware to accelerate Video Processing in Driver Assistance System , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.
[19] Kris Gaj,et al. Secure partial reconfiguration of FPGAs , 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..
[20] James H. Burrows,et al. Secure Hash Standard , 1995 .