On the characteristics of polycrystalline-silicon thin-film transistors; two-dimensional numerical analysis

A two-dimensional non-planar device simulator for poly-Si TFT is developed, in which the influences of trapped charges and carrier scattering within the grain boundary are incorporated into Poisson's equation and drift-diffusion current formulations, respectively. With this simulator, the I-V characteristics of poly-Si TFT devices can be characterized. Thin-film transistors on polycrystalline silicon were fabricated for testing. Excellent agreement between the simulated results and the experimental data has been obtained. Some TFT characteristics, such as the ‘pseudo-subthreshold’ region, the activation energy and the barrier height are investigated and elucidated by our simulator. Finally, making use of this simulator, we have investigated the effects of poly-Si film and gate oxide thickness on the TFT I-V characteristics; the simulated results predict that scaling down the oxide thickness will drastically improve the driving capability by reducing the grain potential barrier.

[1]  J. Seto.  The electrical properties of polycrystalline silicon films , 1975 .

[2]  Michael S. Shur,et al.  Theoretical modeling of amorphous silicon‐based alloy p‐i‐n solar cells , 1983 .

[3]  A. Ortiz-Conde,et al.  Effects of grain boundaries on the channel conductance of SOl MOSFET's , 1983, IEEE Transactions on Electron Devices.

[4]  T. Brody,et al.  The thin film transistor—A late flowering bloom , 1984, IEEE Transactions on Electron Devices.

[5]  D. Thomson,et al.  Thermionic‐field emission from interface states at grain boundaries in silicon , 1984 .

[6]  A. N. Khondker,et al.  Theory of conduction in polysilicon: Drift-diffusion approach in crystalline-amorphous-crystalline semiconductor system—Part I: Small signal theory , 1984, IEEE Transactions on Electron Devices.

[7]  H. Shichijo,et al.  Characteristics and Three-Dimensional Integration of MOSFET's in Small-Grain LPCVD Polycrystalline Silicon , 1985, IEEE Journal of Solid-State Circuits.

[8]  H. Shichijo,et al.  Anomalous leakage current in LPCVD PolySilicon MOSFET's , 1985, IEEE Transactions on Electron Devices.

[9]  T. Noguchi,et al.  Sub-µm polysilicon super thin film transistor , 1986, 1986 International Electron Devices Meeting.

[10]  H. Hayashi,et al.  A Super Thin Film Transistor in Advanced Poly Si Films , 1986 .

[11]  P. Ciampolini,et al.  Numerical simulation of polycrystalline-Silicon MOSFET's , 1986, IEEE Transactions on Electron Devices.

[12]  A. N. Khondker,et al.  A model for PolySilicon MOSFET's , 1987, IEEE Transactions on Electron Devices.

[13]  R. Reif,et al.  Comparison of thin‐film transistors fabricated at low temperatures (≤600 °C) on as‐deposited and amorphized‐crystallized polycrystalline Si , 1987 .

[14]  B. Khan,et al.  Activation energy of source-drain current in hydrogenated and unhydrogenated polysilicon thin-film transistors , 1990 .

[15]  Jyh-Chyurn Guo,et al.  A quasi-two-dimensional analytical model for the turn-on characteristics of polysilicon thin-film transistors , 1990 .