Static Use of Locking Caches in Multitask Preemptive Real-Time Systems

In multitask, preemptive real-time systems, the use of cache memories make difficult the estimation of the response time of tasks, due to the dynamic, adaptive and non-predictable behaviour of cache memories. But many embedded and critical applications need the increase of performance provided by cache memories. This work presents a comprehensive method to attain predictability on the use of caches in real-time systems. Locking cache mechanisms allow to load and lock the content of the cache to ensure it will remain unchanged during execution. By ensuring this, the cache is totally predictable and it allows a more accurate estimation of response time of tasks. In addition, conventional algorithms can be used to accomplish the schedulability analysis. Nowadays, locking cache scheme is present is several commercial processors, and only minor hardware modifications would be necessary in order to obtain the best performance. To select the contents to be preloaded in cache, a genetic algorithm has been developed. This algorithm selects the set of instructions to be locked in cache that give the better performance. It estimates a tight upperbound of the response time of tasks, making simultaneously the schedulability analysis. Experimental results indicate that this scheme is fully predictable, and the performance loss is negligible for around 60% of the tasks. In some cases, the estimated worst case performance using locking cache is better than using a standard cache. 1 INTRODUCTION Modern microprocessors include cache memories in its memory hierarchy to increase system performance. General-purpose systems directly benefit from this architectural improvement, but specific systems, like hard real-time systems, need special hardware resources and/or system analysis to guarantee the time correctness of system behaviour when cache memories are present. In multitask, preemtive real-time systems, response time of any task must be calculated a priori, in order to guarantee that all the tasks meets their deadlines. Using cache memories in such systems presents two problems, due to the dynamic, adaptive and non-predictable behaviour of cache memories. The first problem is to calculate the Worst Case Execution Time (WCET) due to the intra-task or intrinsic interference. Intra-task interference arises when a task removes its own instructions from cache due to conflict and capacity misses. When removed instructions are executed again, a cache miss increases the execution time of the task. This way, the delay caused by cache memory interference must be included in the WCET calculation. The second problem is to calculate the …