S-Box Design Analysis and Parameter Variation in AES Algorithm

In this paper fundamental scrutiny of AES algorithm with the non serviceable aspects i.e. elevated performance, high throughput, and area efficiency is offered. A virtual analysis of DES, 3DES and AES is shown. This paper will present the theoretical analysis of parameter variations in the generation of the S-BOX. The Rijndael cipher, premeditated by Joan Daemen and Vincent Rijmen, is particular as authorized Advance Encryption standard (AES) and it is well apt for hardware exercise.

[1]  Mohammad Ibrahim Al-qudah Doa New S-box Design of Advance Encryption Standard, AES , 2008, Security and Management.

[2]  Saraju P. Mohanty,et al.  A high-performance VLSI architecture for advanced encryption standard (AES) algorithm , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

[3]  M. Liberatori,et al.  AES-128 Cipher. High Speed, Low Cost FPGA Implementation , 2007, 2007 3rd Southern Conference on Programmable Logic.

[4]  Vincent Rijmen,et al.  The Design of Rijndael , 2002, Information Security and Cryptography.

[5]  Christof Paar,et al.  An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists , 2000, AES Candidate Conference.

[6]  B. B. Zaidan,et al.  New Comparative Study Between DES, 3DES and AES within Nine Factors , 2010, ArXiv.

[7]  Athanasios Kakarountas,et al.  A Low Power Design for Sbox Cryptographic Primitive of Advanced Encryption Standard for Mobile End-Users , 2007, J. Low Power Electron..