Energy Saving Method for On-Chip Data Bus Based on Bit Switching Activity Perception with Multi-encoding
暂无分享,去创建一个
[1] Brajesh Kumar Kaushik,et al. Novel Bus Encoding Scheme for RC Coupled VLSI Interconnects , 2011 .
[2] Chih-Hsing Lin,et al. Embedded Transition Inversion Coding With Low Switching Activity for Serial Links , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[3] Zhimin Gu,et al. Pinned OS/Services: A Case Study of XML Parsing on Intel SCC , 2013, Journal of Computer Science and Technology.
[4] Brajesh Kumar Kaushik,et al. Bus encoder design for reduced crosstalk, power and area in coupled VLSI interconnects , 2013, Microelectron. J..
[5] Chi-Ying Tsui,et al. Dynamic reconfigurable bus encoding scheme for reducing the energy consumption of deep sub-micron instruction bus , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).
[6] Mircea R. Stan,et al. Bus-invert coding for low-power I/O , 1995, IEEE Trans. Very Large Scale Integr. Syst..
[7] Anne Rogers,et al. Supporting dynamic data structures on distributed-memory machines , 1995, TOPL.
[8] Ahmad Khademzadeh,et al. Data Encoding Techniques for Reducing Energy Consumption in Network-on-Chip , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[9] Linwei Niu. Energy efficient scheduling for real-time embedded systems with QoS guarantee , 2011, Real-Time Systems.
[10] Srinivas Katkoori,et al. Simultaneous Scheduling, Allocation, Binding, Re-Ordering, and Encoding for Crosstalk Pattern Minimization During High-Level Synthesis , 2011, IEEE Trans. Very Large Scale Integr. Syst..
[11] Chih-Peng Fan,et al. Novel low-power bus invert coding methods with crosstalk detector , 2011 .
[12] John L. Henning. SPEC CPU2006 benchmark descriptions , 2006, CARN.
[13] Weisong Shi,et al. Application configuration selection for energy-efficient execution on multicore systems , 2016, J. Parallel Distributed Comput..
[14] Myungchul Yoon. Achieving Maximum Performance for Bus-Invert Coding with Time-Splitting Transmitter Circuit , 2012, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[15] Kuei-Chung Chang,et al. Reliable network-on-chip design for multi-core system-on-chip , 2009, The Journal of Supercomputing.