UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration

Designers are more and more forced to define innovative models and methodologies for managing integration of heterogeneous components and heterogeneous Chip Multiprocessors (CMPs) in modern embedded systems. In this context, component-based design seems the more promising approach, but it suffers from the lack of a widely adopted Model of Computation (MoC) able to capture component heterogeneity. This paper proposes univerCM, a new model of computation based on the Heterogeneous Intermediate Format (HIF) with the aim of supporting bottom-up design and system integration from a set of heterogeneous components. HW and SW components can be described by means of different languages and according to different MoCs, toward a uniform intermediate description based on a rigorous semantics. A mapping from univerCM to SystemC is proposed then to obtain a homogeneous description intended for fast simulation, that can be also used as starting point for CMP design flows. Experimental results show the effectiveness of univerCM in managing system heterogeneity.

[1]  Fernando Herrera,et al.  A framework for embedded system specification under different models of computation in SystemC , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[2]  Sandeep K. Shukla,et al.  Heterogeneous Behavioral Hierarchy Extensions for SystemC , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Thomas A. Henzinger,et al.  The theory of hybrid automata , 1996, Proceedings 11th Annual IEEE Symposium on Logic in Computer Science.

[4]  Hong Jiang,et al.  Pangaea: A tightly-coupled IA32 heterogeneous chip multiprocessor , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

[5]  Norman P. Jouppi,et al.  Heterogeneous chip multiprocessors , 2005, Computer.

[6]  M. Abid,et al.  A SystemC/Simulink Co-Simulation Framework for Continuous/Discrete-Events Simulation , 2006, 2006 IEEE International Behavioral Modeling and Simulation Workshop.

[7]  Maribel Fernández,et al.  Models of Computation - An Introduction to Computability Theory , 2009, Undergraduate Topics in Computer Science.

[8]  François Pêcheux,et al.  Modeling and Refining Heterogeneous Systems With SystemC-AMS: Application to WSN , 2008, 2008 Design, Automation and Test in Europe.

[9]  Donatella Sciuto,et al.  Affinity-driven system design exploration for heterogeneous multiprocessor SoC , 2006, IEEE Transactions on Computers.

[10]  Giovanni De Micheli,et al.  Readings in hardware / software co-design , 2001 .

[11]  Edward A. Lee,et al.  Component-based design for the future , 2011, 2011 Design, Automation & Test in Europe.

[12]  Daniel D. Gajski,et al.  High ― Level Synthesis: Introduction to Chip and System Design , 1992 .

[13]  Papa Issa Diallo.  Model-Based Engineering for the support of Models of Computation: The Cometa Approach , 2013, Electron. Commun. Eur. Assoc. Softw. Sci. Technol..

[14]  Franco Fummi,et al.  SAGA: SystemC acceleration on GPU architectures , 2012, DAC Design Automation Conference 2012.

[15]  Franco Fummi,et al.  Mixing Simulated and Actual Hardware Devices to Validate Device Drivers in a Complex Embedded Platform , 2009, 2009 10th International Workshop on Microprocessor Test and Verification.

[16]  Goran Frehse.  PHAVer: Algorithmic Verification of Hybrid Systems Past HyTech , 2005, HSCC.

[17]  Soonhoi Ha,et al.  Multiprocessor SoC design methods and tools , 2009, IEEE Signal Processing Magazine.

[18]  Axel Jantsch,et al.  System modeling and transformational design refinement in ForSyDe [formal system design] , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[19]  Luciano Lavagno,et al.  Metropolis: An Integrated Electronic System Design Environment , 2003, Computer.

[20]  Franco Fummi,et al.  UNIVERCM: The UNIversal VERsatile computational model for heterogeneous embedded system design , 2011, 2011 IEEE International High Level Design Validation and Test Workshop.

[21]  Simin Nadjm-Tehrani,et al.  Co-simulation of Hybrid Systems: Signal-Simulink , 2000, FTRTFT.

[22]  Donald E. Thomas,et al.  Scenario-oriented design for single-chip heterogeneous multiprocessors , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[23]  Edward A. Lee,et al.  Taming heterogeneity - the Ptolemy approach , 2003, Proc. IEEE.

[24]  L. Thiele,et al.  Multiprocessor SoC software design flows , 2009, IEEE Signal Processing Magazine.

[25]  Wayne Luk,et al.  HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms , 2010, IEEE Micro.

[26]  Sri Parameswaran,et al.  Design Methodology for Pipelined Heterogeneous Multiprocessor System , 2007, 2007 44th ACM/IEEE Design Automation Conference.