A semiconductor memory device having data input/output lines being routed for shielding signal interference from peripheral control signal lines

PURPOSE: A semiconductor memory device having a wiring structure to shield an interference of a signal as to a data input output line of a peripheral control signal line is provided, which can protect input/output data swing with a low voltage as passing through a global input output line, by isolating the global input output line electrically. CONSTITUTION: A plurality of memory cell sub arrays(510) comprises a plurality of memory cells, and are arranged in a row and column direction. A plurality of BL-SA(Bit Line Sense Amplifier)(520) input and output data of a related memory cell through a local input output line, and are arranged between the plurality of memory cell sub arrays. A SWD(Sub WorD line) area(530) is arranged between the plurality of memory cell sub arrays in a row direction.. And a plurality of global input output lines(GIOs) pass above the plurality of memory cell sub arrays in a column direction. A plurality of multiplexers(MUX)(522) are located on the BL-SA area, and are arranged in a column direction, and connect the corresponding local input output line and the corresponding global input output line. And a plurality of equalizers(524) precharge related local input output line.