An analysis on a pseudo-differential dynamic comparator with load capacitance calibration

This paper analyzes a pseudo-differential dynamic comparator with a dynamic pre-amplifier. The transient gain of a dynamic pre-amplifier is derived. This analysis enhances understanding of the roles of a transistor's parameters in a pre-amplifier's gain. Based on the calculated gain, a load capacitance calibration method is analyzed. The analysis helps designers' estimation for the accuracy of the calibration and the influence of PVT variation. The analyzed comparator uses 90-nm CMOS technology as an example and each estimation is compared with the simulation results.

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