Low-Swing Signaling on Monolithically Integrated Global Graphene Interconnects

In this paper, we characterize the performance of monolithically integrated graphene interconnects on a prototype 0.35-μm CMOS chip. The test chip implements an array of transmitter/receivers to analyze the end-to-end data communication on graphene wires. Large-area graphene sheets are first grown by chemical vapor deposition, which are then subsequently processed into narrow wires up to 1 mm in length. A low-swing signaling technique is applied, which results in a transmitter energy of 0.3-0.7 pJ/b·mm-1 and a total energy of 2.4-5.2 pJ/b·mm-1. Bit error rates below 2 × 10-10 are measured using a 231 - 1 pseudorandom binary sequence. Minimum voltage swings of 100 mV at 1.5-V supply and 500 mV at 3.3-V supply have also been demonstrated. At present, the graphene wire is largely limited by its growth quality and high sheet resistance.

[1]  G. Fudenberg,et al.  Ultrahigh electron mobility in suspended graphene , 2008, 0802.2389.

[2]  A.P. Chandrakasan,et al.  A 65 nm Sub-$V_{t}$ Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter , 2008, IEEE Journal of Solid-State Circuits.

[3]  Young Hee Lee,et al.  Enhancing the conductivity of transparent graphene films via doping , 2010, Nanotechnology.

[4]  C. Xu,et al.  Graphene nano-ribbon (GNR) interconnects: A genuine contender or a delusive dream? , 2008, 2008 IEEE International Electron Devices Meeting.

[5]  C. N. Lau,et al.  PROOF COPY 020815APL Extremely high thermal conductivity of graphene: Prospects for thermal management applications in nanoelectronic circuits , 2008 .

[6]  P. Kim,et al.  Energy band-gap engineering of graphene nanoribbons. , 2007, Physical review letters.

[7]  S. Xiao,et al.  Intrinsic and extrinsic performance limits of graphene devices on SiO2. , 2007, Nature nanotechnology.

[8]  Xu Du,et al.  Approaching ballistic transport in suspended graphene. , 2008, Nature nanotechnology.

[9]  D. Teweldebrhan,et al.  High-temperature quenching of electrical resistance in graphene interconnects , 2008 .

[10]  M. Horowitz,et al.  Efficient on-chip global interconnects , 2003, 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408).

[11]  Kwang S. Kim,et al.  Large-scale pattern growth of graphene films for stretchable transparent electrodes , 2009, Nature.

[12]  J.A. Davis,et al.  Interconnecting device opportunities for gigascale integration (GSI) , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

[13]  J. Meindl,et al.  Conductance Modeling for Graphene Nanoribbon (GNR) Interconnects , 2007, IEEE Electron Device Letters.

[14]  Justin Schauer,et al.  High Speed and Low Energy Capacitively Driven On-Chip Wires , 2008, IEEE Journal of Solid-State Circuits.

[15]  A. Reina,et al.  Large area, few-layer graphene films on arbitrary substrates by chemical vapor deposition. , 2009, Nano letters.

[16]  James D. Meindl,et al.  Interconnect Opportunities for Gigascale Integration , 2002, IEEE Micro.

[17]  M. Bohr Interconnect scaling-the real limiter to high performance ULSI , 1995, Proceedings of International Electron Devices Meeting.

[18]  R. H. Havemann,et al.  Line width dependence of copper resistivity , 2001, Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461).

[19]  C. N. Lau,et al.  Superior thermal conductivity of single-layer graphene. , 2008, Nano letters.

[20]  A Gupta,et al.  Raman scattering from high-frequency phonons in supported n-graphene layer films. , 2006, Nano letters.

[21]  H. Dai,et al.  Room-temperature all-semiconducting sub-10-nm graphene nanoribbon field-effect transistors. , 2008, Physical review letters.

[22]  Kwang S. Kim,et al.  Roll-to-roll production of 30-inch graphene films for transparent electrodes. , 2010, Nature nanotechnology.

[23]  Eisse Mensink,et al.  A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[24]  Jing Kong,et al.  High-speed graphene interconnects monolithically integrated with CMOS ring oscillators operating at 1.3GHz , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[25]  George Varghese,et al.  Low-swing on-chip signaling techniques: effectiveness and robustness , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[26]  Jong-Hyun Ahn,et al.  Wafer-scale synthesis and transfer of graphene films. , 2009, Nano letters.

[27]  S. Xiao,et al.  Intrinsic and extrinsic performance limits of graphene devices on SiO 2 , 2008 .

[28]  C. Berger,et al.  Electronic Confinement and Coherence in Patterned Epitaxial Graphene , 2006, Science.

[29]  R. Murali,et al.  Resistivity of Graphene Nanoribbon Interconnects , 2009, IEEE Electron Device Letters.

[30]  S. Banerjee,et al.  Large-Area Synthesis of High-Quality and Uniform Graphene Films on Copper Foils , 2009, Science.

[31]  J. Meindl,et al.  Breakdown current density of graphene nanoribbons , 2009, 0906.4156.