A 160-Gb/s ATM switching system using an internal speed-up crossbar switch

A 160 Gb/s ATM switching system handling sixteen 10-Gb/s input lines is constructed by using an internal speed-up crossbar switch. The switch is structured around an input/output buffering switch architecture, high-speed bipolar devices and multichip module technology. The switch adopts a bufferless crossbar network realized with high-speed bipolar devices and cell buffers only on each input and output line. Using a separate architecture to link the bufferless routing network to the cell buffers, 20 Gb/s high-speed cell transmission can be easily realized in the crossbar network. In addition, a new high-speed arbitration algorithm using three bus lines on each output line, named the bi-directional arbiter, is adopted. The bi-directional arbiter is about 1.5 times faster than the conventional ring-arbiter and has the same fairness function. Using the switching system, a sub-tera-bit/s ATM switching system can be achieved in a significant step towards broadband ISDN.

[1]  M. Suzuki,et al.  Over 20 Gbit/s throughput ATM crosspoint switch large scale integrated circuit using Si bipolar technology , 1994 .

[2]  Katsumi Kaizu,et al.  Heat-Pipe Cooling Technology for High-Speed Atm Switching Mcms , 1994, Proceedings of the International Conference on Multichip Modules.

[3]  H. Ishikawa,et al.  Evolving from narrowband (ISDN) , 1992, IEEE Communications Magazine.

[4]  Joseph Y. Hui,et al.  A Broadband Packet Switch for Integrated Transport , 1987, IEEE J. Sel. Areas Commun..

[5]  N. Yamanaka,et al.  320 Gb/s high-speed ATM switching system hardware technologies based on copper-polyimide MCM , 1994 .

[6]  Koso Murakami,et al.  A development of a high speed ATM switching LSIC , 1990, IEEE International Conference on Communications, Including Supercomm Technical Sessions.

[7]  Tadashi Sakai,et al.  Gigabit logic bipolar technology: advanced super self-aligned process technology , 1983 .

[8]  Hiroshi Kuwahara,et al.  A shared buffer memory switch for an ATM exchange , 1989, IEEE International Conference on Communications, World Prosperity Through Communications,.

[9]  Katsumi Kaizu,et al.  Multichip module technologies for high-speed ATM switching systems , 1994, Proceedings of the International Conference on Multichip Modules.

[10]  H. Suzuki,et al.  Output-buffer switch architecture for asynchronous transfer mode , 1989, IEEE International Conference on Communications, World Prosperity Through Communications,.

[11]  T. Takahashi,et al.  A multi-purpose memory switch LSI for ATM-based systems , 1990, [Proceedings] GLOBECOM '90: IEEE Global Telecommunications Conference and Exhibition.