Design optimization of RF low noise amplifier in twin‐well CMOS process

This article presents an optimization technique aiming to improve gain and noise performances simultaneously, through the design of a cost-effective low noise amplifier (LNA) in a mixed-signal CMOS process without an RF triple-well option. To alleviate the inherent body-effect within a twin-well MOS transistor, we applied a transmission-line based source degeneration inductor Ls instead of a conventional spiral in the RF amplifier. In our design, without additional DC-power payment, the gain and noise figures (NF50) improved by 26% and 7.1%, respectively, when compared to the conventional spiral. The proposed LNA was implemented in a 0.18 µm 1-poly 6-metal mixed-signal CMOS process, and achieved a 13.1 dB gain and 2.72 dB noise figure while dissipating 8.76 mA from a 1.4 V supply.