A 7.2 mW 75.3 dB SNDR 10 MHz BW CT Delta-Sigma Modulator Using Gm-C-Based Noise-Shaped Quantizer and Digital Integrator

This paper presents a continuous-time (CT) delta-sigma modulator using a Gm-C based noise-shaped integrating quantizer (NSIQ) with a digital back-end integrator. By incorporating the digital back-end integrator, the tradeoff between resolution and speed for a conventional time-based NSIQ is alleviated. Using only three clock edges and a low-power Gm-C, effective 4-bit quantization with an additional first order noise-shaping is achieved. Also, the linearity requirement of the quantizer is relaxed by employing the digital back-end integrator. The proposed modulator was fabricated in a 0.13 <inline-formula> <tex-math notation="LaTeX">$\mu \text {m}$ </tex-math></inline-formula> CMOS process with an active area of 0.08 <inline-formula> <tex-math notation="LaTeX">$\text {mm}^{2}$ </tex-math></inline-formula>. It operates at 640 MHz and achieves a peak SNDR of 75.3 dB and a peak SFDR of 94.1 dB in a 10 MHz bandwidth while consuming 7.2 mW from a 1.2 V power supply.

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