A new bonding technology dealing with large CTE mismatch between large Si chips and Cu substrates

Fluxless bonding between large silicon (Si) chips and copper (Cu) substrates using electroplated indium (In) and silver (Ag) as solders has been successfully developed. The nucleation mechanism in In-Ag system is first studied. It is interesting to discover that In reacts with underlying Ag and forms Agln2 as soon as it is electroplated at room temperature. To reduce stress caused by coefficient of thermal expansion (CTE) mismatch between Si and Cu, a 280 mum thick Ag foil, working as a stress buffer, is directly bonded on Cu substrate at low process temperature of 250degC. It is a typical reflow temperature of lead-free (Pb-free) solders. There are three different bonding structure designs to perform fluxless bonding between Si chips and Ag-cladded Cu substrates in this project. High quality joints are achieved by conducting bonding between Si/Cr/Au/Ag and Cu/Ag/In/Ag in 50 millitorr vacuum. The initial joint is very strong without any voids. It consists of three distinct layers of Ag, Ag2In, and Ag. Further annealing step is employed on the bonded sample to convert Ag2In intermetallic compound (IMC) into (Ag) solid solution phase. The resulting joint comprises (Ag) and pure Ag layers and is expected to sustain high operating temperature up to 850degC. The joints do not contain any IMC layers. Thus, all reliability issues associated with IMCs and IMC growth do not exist anymore. This novel bonding process can be applied to a variety of electronic devices that require high thermal performance or high operating temperature.