A PET detector module using FPGA-only MVT digitizers

Multi-voltage threshold (MVT) is an amplitude-based sampling method. It takes timing samples when the event pulse crosses the user-defined thresholds. Only a few comparators and TDCs are required when implementing such digitizer. Previously, we have demonstrated an FPGA-only MVT digitizer based on this method. The FPGA-only MVT digitizer employs the differential I/Os in an FPGA as the required comparators and FPGA based TDCs. The implementation of this digitizer is entirely based on the FPGA. We have demonstrated that it is possible to implement a significant number of MVT digitizers by using a single FPGA. It is also flexible, as it allows us to readily modify, or add functions to, the implementation without requiring costly hardware changes. Currently, we are developing a PET detector module using the FPGA-only MVT digitizer. In this paper we describe the design and implementation of the detector module and report its performance properties. The detector module has a total detection sensitive area of 50mm × 50mm, an overall energy resolution of 15.1% FWHM at 511keV, and a module-level coincidence timing resolution of 684ps FWHM. In addition, our preliminary imaging with such detector module successfully resolves 1.6mm-diameter rods separated by 3.2mm.