Employment of microwave absorbers for EMI/RFI mitigations from high speed digital buses with signal integrity considerations

An analysis of electromagnetic radiation reduction achieved by placement of microwave absorbers over a serial high speed digital channel is performed. The study is performed on a second generation peripheral component interconnect express (PCIe Gen II) interface with 5.0 Gbps transfer rate. A set of full wave simulations are performed on a printed circuit board with the PCIe interface implemented in an embedded micro-strip line structure. Lossy material patches are applied onto the channel to reduce the electromagnetic radiations from differential pairs. This reduction might be required especially in compact mixed signal systems as noisy digital circuits are located close to radio-frequency receivers with stringent sensitivity limits. Using the numerical solver, it has been shown that the application of the absorber can reduce the magnitude of the received electromagnetic fields at the desired locations while unfortunately affecting the signal integrity performance of the bus. In order to reduce the unintentional discontinuity introduced along the differential pairs as applying the material on the PCB, the insertion of a dielectric spacer sheet between the absorber and the solder mask is investigated. It has been shown that the presence of a thin layer of the spacer (less than 0.2mm) can significantly decrease the introduced mismatch while still keeping the benefit of the EM reduction. Full wave simulation results are being confirmed by near field probing set-up and a PCIe compliance test board.