A CMOS continuous-time G/sub m/-C filter for PRML read channel applications at 150 Mb/s and beyond

Design techniques for equiripple phase CMOS continuous-time filters are presented, and their integration within a partial-response maximum likelihood (PRML) disk drive read channel is discussed. A programmable seven-pole two asymmetric zero filter implementation is described based on a new transconductance (G/sub m/) cell. The impact of integrator finite output impedance, excess phase, and other implementation related nonidealities is discussed. A filter tuning circuit that requires an accurate time base but no external components is presented. The filter has a cutoff frequency (f/sub c/) range of 6-43 MHz, where f/sub c/ is the -3 dB point of the magnitude transfer function with the two zeros set to infinity. Also, with finite zeros it is able to provide up to 12 dB of boost which is defined as the maximum value of the magnitude transfer function referred to dc. The group delay ripple stays within /spl plusmn/2% for frequencies below 1.75 f/sub c/. The cutoff frequency exhibits a 650 ppm//spl deg/C temperature dependency and a variation of /spl plusmn/1%/V with the power supply. Total harmonic distortion (THD) values are below -40 dB at twice the nominal operating input voltage (V/sub nominal/=320 mV peak-to-peak differential), and the dynamic range exceeds 60 dB (for a maximum input signal of 640 mV peak-to-peak differential, maximum bandwidth setting, and no boost). Both the filter and a tuning circuit were implemented in a 0.6-/spl mu/m single-poly triple-metal n-well CMOS process. They consume 90 mW from a single 5 V power supply and occupy an area of 0.8 mm/sup 2/.

[1]  Anatol I. Zverev,et al.  Handbook of Filter Synthesis , 1967 .

[2]  Yannis Tsividis,et al.  Continuous-time MOSFET-C filters in VLSI , 1986 .

[3]  Phillip E Allen,et al.  CMOS Analog Circuit Design , 1987 .

[4]  Francois Krummenacher,et al.  A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning , 1987, ESSCIRC '87: 13th European Solid-State Circuits Conference.

[5]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[6]  R. Schaumann,et al.  Design of a 4-MHz analog integrated CMOS transconductance-C bandpass filter , 1988 .

[7]  P. M. VanPeteghem,et al.  Tuning strategies in high-frequency integrated continuous-time filters , 1989 .

[8]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[9]  Asad A. Abidi,et al.  CMOS active filter design at very high frequencies , 1990 .

[10]  Edgar Sanchez-Sinencio,et al.  Active compensation of operational transconductance amplifier filters using partial positive feedback , 1990 .

[11]  J. M. Khoury.  Design of a 15-MHz CMOS continuous-time filter with on-chip tuning , 1991 .

[12]  Michiel Steyaert,et al.  A large-signal very low-distortion transconductor for high-frequency continuous-time filters , 1991 .

[13]  Eric A. M. Klumperink,et al.  A CMOS OTA for HF filters with programmable transfer function , 1991 .

[14]  Roy D. Cideciyan,et al.  A PRML System for Digital Magnetic Recording , 1992, IEEE J. Sel. Areas Commun..

[15]  Michiel Steyaert,et al.  A 10.7-MHz 68-dB SNR CMOS continuous-time filter with on-chip automatic tuning , 1992 .

[16]  Andrea Baschirotto,et al.  Tunable BiCMOS continuous-time filter for high-frequency applications , 1992 .

[17]  J. Silva-Martinez,et al.  Design techniques for high-performance full-CMOS OTA-RC continuous-time filters , 1992, IEEE Journal of Solid-State Circuits.

[18]  William Martin Snelgrove,et al.  A balanced 0.9- mu m CMOS transconductance-C filter tunable over the VHF range , 1992 .

[19]  G. A. De Veirman,et al.  Design of a bipolar 10-MHz programmable continuous-time 0.05 degrees equiripple linear phase filter , 1992 .

[20]  Bram Nauta,et al.  A CMOS transconductance-C filter technique for very high frequencies , 1992 .

[21]  John B. Hughes,et al.  High-linearity continuous-time filter in 5-V VLSI CMOS , 1992 .

[22]  David J. Allstot,et al.  CMOS continuous-time current-mode filters for high-frequency applications , 1993 .

[23]  P. R. Gray,et al.  A 20-MHz sixth-order BiCMOS parasitic-insensitive continuous-time filter and second-order equalizer optimized for disk-drive read channels , 1993 .

[24]  Robert Andrew Kertis,et al.  A 7 Mbyte/s (65 MHz), mixed-signal, magnetic recording channel DSP using partial response signaling with maximum likelihood detection , 1993 .

[25]  Trent Dudley,et al.  A digital read/write channel with EEPR4 detection , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[26]  Yannis Tsividis,et al.  Integrated continuous-time filter design - an overview , 1994, IEEE J. Solid State Circuits.

[27]  Asad A. Abidi,et al.  A 40-mW 55 Mb/s CMOS equalizer for use in magnetic storage read channels , 1994 .

[28]  Benjamin J. Sheahan,et al.  An analog front-end signal processor for a 64 Mbits/s PRML hard-disk drive channel , 1994 .

[29]  P. R. Gray,et al.  A 100 MHz A/D interface for PRML magnetic disk read channels , 1994 .

[30]  Benjamin J. Sheahan,et al.  An analog front-end signal processor for a 64 Mb/s PRML hard-disk drive channel , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[31]  Shunsaku Ueda,et al.  A 3.0 V 40 Mb/s hard disk drive read channel IC , 1995 .

[32]  Jacques C. Rudell,et al.  A 50 MHz eight-tap adaptive equalizer for partial-response channels , 1995 .

[33]  D. Kuai,et al.  A 130 Mb/s PRML read/write channel with digital-servo detection , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[34]  K. Parsi,et al.  A 200 Mb/s PRML read/write channel IC , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[35]  R. Dakshinamurthy,et al.  A 200 Mb/s analog DFE read channel , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

[36]  T. Matsuura,et al.  A 150 Mb/s PRML chip for magnetic disk drives , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.