论文信息 - An Efficient TSC 1-out-of-3 Code Checker

An Efficient TSC 1-out-of-3 Code Checker

A design method for a combinational totally self-checking (TSC) 1-out-of-3 code checker is presented. This method is not only simpler and more efficient than others, but is also successful in the case where more than one 1-out-of-3 code exists in a TSC system. >

Constantin Halatsis | Antonis M. Paschalis | Costas Efstathiou

[1] Petr Golan. Design of Totally Self-Checking Checker for 1-out-of-3 Code , 1984, IEEE Transactions on Computers.

[2] William C. Carter,et al. Design of dynamically checked computers , 1968, IFIP Congress.

[3] Gernot Metze,et al. Design of Totally Self-Checking Check Circuits for m-Out-of-n Codes , 1973, IEEE Transactions on Computers.

[4] Javad Khakbaz. Totally Self-Checking Checker for 1-out-of-n Code Using Two-Rail Codes , 1982, IEEE Transactions on Computers.

[5] Constantin Halatsis,et al. Modular design of totally self-checking checkers for 1-out-of-n codes , 1984, Fehlertolerierende Rechensysteme.

[6] Constantin Halatsis,et al. Efficient Modular Design of TSC Checkers for M-out-of-2M Codes , 1988, IEEE Trans. Computers.

[7] Yves Crouzet,et al. Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor , 1980, IEEE Transactions on Computers.

[8] S. M. Reddy. Note on Self-Checking Checkers , 1974, IEEE Transactions on Computers.

[9] P. K. Lala,et al. A MOS implementation of totally self-checking checker for the 1-out-of-3 code , 1988 .

[10] René David. A Totally Self-Checking 1-Out-of-3 Checker , 1978, IEEE Transactions on Computers.

[11] Niraj K. Jha,et al. TOTALLY SELF-CHECKING MOS CIRCUITS UNDER REALISTIC PHYSICAL FAILURES. , 1984 .

[12] Kang G. Shin,et al. Ensuring Fault Tolerance of Phase-Locked Clocks , 1985, IEEE Transactions on Computers.